Computer Architecture and Digital Logic Design - Comprehensive Examination Syllabus

Topics	Readings
Basics of Logic Design Combinational logic, finite state machines	[Patt94] Appendix B
Performance metrics and calculations, performance equations, Amdahl's law	[Henn96] 1.5-1.8 [Patt94] 2
Instruction Set Architecture instruction set classifications, addressing modes, instruction encoding, impact of high-level language and compilers	[Henn96] 2 [Patt94] 3
Computer Arithmetic binary number systems, floating-point numbers, operations on binary numbers, implementations, ALU design, fast adder design	[Patt94] 4
CPU Design And Architecture stages of execution, basic CPU organization, single-cycle and multiple-cycle designs, microprogramming vs. hardwired control, interrupts	[Patt94] 5
Pipelining dependencies, data and control hazards, resolving hazards, forwarding, exceptions, multiple-functional-unit pipelines	[Patt94] 6 [Henn96] 3
Advanced Pipelining and Instruction Level Parallelism dynamic scheduling, branch prediction, superscalar issue, compiler and architectural support for ILP, register renaming	[Henn96] 4
Memory Hierarchy caches and cache hierarchies, cache organizations, cache performance, compiler support for cache performance, main memory organization, virtual memory, TLBs	[Henn96] 5 [Patt94] 7
1/0 characteristics of UO devices. Buses (at the "big picture" level). Polling, interrupt-driven UO, DMA.	[Patt94] 8

References

[Henn96] Hennessy and Patterson, "Computer Architecture: A Quantitative Approach," Second Edition, Morgan Kaufmann Publishers, 1996
[Patt94] Patterson and Hennessy, "Computer Organization and Design: The Hardware/Software Interface," Morgan Kaufmann Publishers, 1994